In order to adapt to the the requirement of the Instruction Set Simulator (ISS) simulation speed in embedded system development, an improved ISS technology was put forward.The technology introduced instruction preprocessing, dynamic decode cache structure, multi-thread C function generation and dynamic scheduling technique based on the existing static multi-core simulator to achieve the optimization of the simulator performance. This technique has been applied successfully in forming OPT-ISS, which is based on IME-Diamond multi-core DSP processor. The experimental results show that this technique improves the simulation speed indeed.
Due to the swallow and over-enhancement problems of traditional histogram equalization, an improved histogram equalization algorithm combining scene classification and details preservation was proposed. In this algorithm, images were classified according to their histogram features. The parameter of piecewise histogram equalization was optimized according to the scene classification and the characteristics of image histogram. The complexity of the improved algorithm is only O(L).L is the level of image grayscale, and equals to 256 here. The improved algorithm has the small amount of computation and solves the swallow and over-enhancement problems of traditional histogram equalization. The results from TI (Texas Instruments) DM648 platform show the algorithm can be used for real-time video image enhancement.